Volume : 6, Issue : 4, April - 2017
Ethernet Preamble Detector
Sharat Chandra Musham, Astha Jain, Abhishek Banerjee, Bala Chintamneedi
Abstract :
<p> <span style="font-family: "Times New Roman", serif; font-size: 12pt; text-align: justify;">We implemented HDLC frame detector in our earlier work. HDLC frame detector basically detects the pre-amble, which precedes the frame. The detector output serves as a trigger to the main circuit which processes the packet. HDLC pre-amble is 0x7E. We implemented a state machine to detect the sequence. In project 1, we minimized the asynchronous state machine and derived the Logic equations for each state and the output. We further wrote Verilog code to implement the minimized circuit.</span></p> <pre style="text-align:justify"><span style="font-size:12.0pt;font-family:"Times New Roman",serif"><o:p></o:p></span></pre>
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Cite This Article:
Sharat Chandra Musham, Astha Jain, Abhishek Banerjee, Bala Chintamneedi, Ethernet Preamble Detector, GLOBAL JOURNAL FOR RESEARCH ANALYSIS : Volume-6, Issue-4, April‾2017